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general description the max2820/max2820a and max2821/max2821a single -chip zero-if transceivers are designed for the 802.11b (11mbps) applications operating in the 2.4ghz to 2.5ghz ism band. the transceivers are nearly identical, except the max2821 and max2821a also provide a low-power shutdown mode and an ana- log voltage reference output. the max2820a/ max2821a are cost-reduced versions, virtually identi- cal in pinout and performance to the max2820/ max2821. the transceivers include all the circuitry required to implement an 802.11b rf-to-baseband transceiver solution, providing a fully integrated receive path, transmit path, vco, frequency synthesis, and baseband/control interface. only a pa, rf switch, rf bpf, and a small number of passive components are needed to form the complete radio front-end solution. the ics eliminate the need for external if and base- band filters by utilizing a direct-conversion radio archi- tecture and monolithic baseband filters for both receiver and transmitter. they are specifically opti- mized for 802.11b (11mbps cck) applications. the baseband filtering and rx and tx signal paths support the cck modulation scheme for ber = 10 -5 at the required sensitivity levels. the devices are suitable for the full range of 802.11b data rates (1mbps, 2mbps, 5.5mbps, and 11mbps) and also the higher-rate 22mbps pbcc tm standard. the max2820 and max2821 are available in a 7mm 7mm 48-lead qfn package. the max2820, max2821, max2820a, and max2821a are available in a 48-lead thin qfn package. applications 802.11b 11mbps wlan 802.11b + 22mbps pbcc high-data-rate wlan 802.11a + b dual-band wlan 2.4ghz ism band radios features 2.4ghz to 2.5ghz ism band operation 802.11b (11mbps cck and 22mbps pbcc) phy compatible complete rf-to-baseband transceiver direct-conversion upconverters and downconverters monolithic low-phase-noise vco integrated baseband lowpass filters integrated pll with 3-wire serial interface digital bias control for external pa transmit power control (range > 25db) receive baseband agc (range > 65db) complete baseband interface digital tx/rx mode control analog receive level detection -97dbm rx sensitivity at 1mbps -87dbm rx sensitivity at 11mbps +2dbm transmit power (11mbps cck) single +2.7v to +3.6v supply low-current shutdown mode (max2821 only) very small 48-pin qfn package(s) max2820/max2820a/max2821/max2821a 2.4ghz 802.11b zero-if transceivers ________________________________________________________________ maxim integrated products 1 ordering information 19-2493; rev 5; 5/05 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. part temp range pin-package max2820 etm-td -40 c to +85? 48 thin qfn max2820etm+td -40 c to +85? lead free max2820a etm-td -40 c to +85? 48 thin qfn max2820aetm+td -40 c to +85? lead free max2821 etm-td -40 c to +85 c 48 thin qfn max2821etm+td -40 c to +85? lead free max2821a etm-td -40 c to +85 c 48 thin qfn max2821aetm+td -40 c to +85? lead free pin configuration/functional diagram and typical application circuit appear at end of data sheet. pbcc is a trademark of texas instruments, inc.
max2820/max2820a/max2821/max2821a 2.4ghz 802.11b zero-if transceivers 2 _______________________________________________________________________________________ absolute maximum ratings dc electrical characteristics (max2820/max2821 ev kit: v cc = +2.7v to +3.6v, rf_gain = v ih , 0v v tx_gc +2.0v, 0v v rx_agc +2.0v, rbias = 12k , no input signals at rf and baseband inputs, all rf inputs and outputs terminated into 50 , receiver baseband outputs are open, trans- mitter baseband inputs biased at +1.2v, registers set to default power-up settings, t a = -40 c to +85 c, unless otherwise noted. typical values are at v cc = +2.7v, t a = +25 c, unless otherwise noted.) (note 1) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v cc pins to gnd ...................................................-0.3v to +4.2v rf inputs: rx_rfp, rx_rfn to gnd.........-0.3v to (v cc + 0.3v) rf outputs: tx_rfp, tx_rfn to gnd..................-0.3v to +4.2v baseband inputs: tx_bbip, tx_bbin, tx_bbqp, tx_bbqn to gnd ...................................-0.3v to (v cc + 0.3v) baseband outputs: rx_bbip, rx_bbin, rx_bbqp, rx_bbqn to gnd ...................................-0.3v to (v cc + 0.3v) analog inputs: rx_agc, tx_gc, tune, roscn, roscp to gnd .......................................-0.3v to (v cc + 0.3v) analog outputs: pa_bias, cp_out, vref to gnd.....................................................-0.3v to (v cc + 0.3v) digital inputs: rx_on, tx_on, shdnb, csb, sclk, din, rf_gain, rx_1k to gnd................-0.3v to (v cc + 0.3v) bias voltages: rbias, byp ..................................+0.9v to +1.5v short-circuit duration digital outputs: dout, rx_det .........10s rf input power: rx_rfn, rx_rfp.................................+10dbm continuous power dissipation (t a = +70 c) 48-lead qfn (derate 27.0mw/ c above +70 c)...........2162mw 48-lead thin qfn (derate 38.5mw/ c above +70 c) ...................................................................3077mw operating temperature range ...........................-40 c to +85 c junction temperature ......................................................+150 c storage temperature range .............................-65 c to +160 c lead temperature (soldering, 10s) .................................+300 c parameters conditions min typ max units supply voltage 2.7 3.6 v shutdown-mode supply current (max2821 and max2821a) shdnb = v il , rx_on = v il , tx_on = v il t a = -40 ? c to +85 c 2 50 a t a = +25 ? c2535 standby-mode supply current shdnb = v ih , rx_on = v il , tx_on = v il t a = -40 ? c to +85 c40 ma t a = +25 ? c 80 100 receive-mode supply current shdnb = v ih , rx_on = v ih , tx_on = v il t a = -40 ? c to +85 c 110 ma t a = +25 c7085 transmit-mode supply current shdnb = v ih , rx_on = v il , tx_on = v ih t a = -40 ? c to +85 c90 ma logic inputs: shdnb, rx_on, tx_on, sclk, din, csb, rf_gain digital input voltage high (v ih ) v cc - 0.5 v digital input voltage low (v il ) 0.5 v digital input current high (i ih )-5+5a digital input current low (i il )-5+5a logic outputs: dout, rx_det digital output voltage high (v oh ) sourcing 100a v cc - 0.5 v digital output voltage low (v ol ) sinking 100a 0.5 v rx baseband i/o rx_agc input resistance 0v v rx_agc +2.0v 50 k ? rx i/q common-mode voltage 1.25 v rx i/q output dc offsets 15 mv voltage reference (max2821/max2821a) reference voltage output t a = -40 ? c to +85 ? c, i load = 2ma 1.1 1.2 1.3 v output impedance 25 ? caution! esd sensitive device
max2820/max2820a/max2821/max2821a 2.4ghz 802.11b zero-if transceivers _______________________________________________________________________________________ 3 dc electrical characteristics (continued) (max2820/max2821 ev kit: v cc = +2.7v to +3.6v, rf_gain = v ih , 0v v tx_gc +2.0v, 0v v rx_agc +2.0v, rbias = 12k , no input signals at rf and baseband inputs, all rf inputs and outputs terminated into 50 , receiver baseband outputs are open, trans- mitter baseband inputs biased at +1.2v, registers set to default power-up settings, t a = -40 c to +85 c, unless otherwise noted. typical values are at v cc = +2.7v, t a = +25 c, unless otherwise noted.) (note 1) ac electrical characteristics?receive mode (max2820/max2821 ev kit: v cc = +2.7v to +3.6v, f rf and f lo = 2400mhz to 2499mhz, f osc = 22mhz or 44mhz, receive baseband outputs = 500mv p-p , shdnb = rx_on = v ih , tx_on = v il , csb = v ih , sclk = din = v il , rf_gain = v ih , 0v v rx_agc +2.0v, rbias = 12k , i cp = +2ma, bw pll = 45khz, differential rf input matched to 50 , registers set to default power-up settings, t a = +25 c, unless otherwise noted. typical values are at v cc = +2.7v, f lo = 2437mhz, f osc = 22mhz, unless otherwise noted.) (note 1) parameters conditions min typ max units tx baseband i/o tx bb input common-mode range 1.0 1.2 1.4 v tx bbi and bbq input bias current -10 a tx bb input impedance differential resistance 100 k ? tx_gc input bias current 0v v tx_gc +2.0v 10 a tx_gc input impedance resistance 250 k ? reference oscillator input reference oscillator input impedance 20 k ? parameter conditions min typ max units receiver cascade performance (rf input to baseband output) rf frequency range 2400 2499 mhz lo frequency range 2400 2499 mhz t a = +25 ? c 97 105 rf_gain = v ih , v rx_agc = 0v t a = -40 c to +85 c95 rf_gain = v ih , v rx_agc = +2.0v t a = +25 c33 rf_gain = v il , v rx_agc = 0v t a = +25 c75 voltage gain (note 2) rf_gain = v il , v rx_agc = +2.0v t a = +25 c2 db rf gain step from rf_gain = v ih to rf_gain =v il 30 db rf_gain = v ih , rx gain 80db 3.5 rf_gain = v ih , rx gain = 50db 4.5 dsb noise figure (note 3) rf_gain = v il , rx gain = 50db 34 db adjacent channel rejection rx gain = 70db (note 4) 49 db rf_gain = v ih , rx gain = 80db -14 input third-order intercept point (note 5) rf_gain = v il , rx gain = 50db 18 dbm rf_gain = v ih , rx gain = 80db 22 input second-order intercept point (note 6) rf_gain = v il , rx gain = 50db 60 dbm
max2820/max2820a/max2821/max2821a 2.4ghz 802.11b zero-if transceivers 4 _______________________________________________________________________________________ ac electrical characteristics ? receive mode (continued) (max2820/max2821 ev kit: v cc = +2.7v to +3.6v, f rf and f lo = 2400mhz to 2499mhz, f osc = 22mhz or 44mhz, receive baseband outputs = 500mv p-p , shdnb = rx_on = v ih , tx_on = v il , csb = v ih , sclk = din = v il , rf_gain = v ih , 0v v rx_agc +2.0v, rbias = 12k , i cp = +2ma, bw pll = 45khz, differential rf input matched to 50 , registers set to default power-up settings, t a = +25 c, unless otherwise noted. typical values are at v cc = +2.7v, f lo = 2437mhz, f osc = 22mhz, unless otherwise noted.) (note 1) parameter conditions min typ max units lo leakage -65 dbm input return loss with external match 15 db receiver baseband baseband filter response max2820/ max2821 default bandwidth setting bw (2:0) = (010) 7 -3db frequency max2820a/ max2821a 8 mhz at 12.5mhz 40 at 16mhz 65 at 20mhz 70 max2820/ max2821 at 30mhz 85 at 12.5mhz 28 at 16mhz 52 at 20mhz 70 attenuation relative to passband max2820a/ max2821a at 30mhz 85 db baseband output characteristics rx i/q gain imbalance -1 +1 db rx i/q phase quadrature imbalance -5 +5 degrees rx i/q output 1db compression differential voltage into 5k ? 1v p-p rx i/q output thd v out = 500mv p-p at 5.5mhz, z l = 5k ? ||5pf -35 dbc baseband agc amplifier agc range v rx_agc = 0 to +2.0v 70 db agc slope peak gain slope 60 db/v agc response time 20db gain step, 80db to 60db, settling to 1db 2s baseband rx peak level detection (max2820/max2821 only) rf_gain = v ih , rx_det = v ol to v oh -49 rx detector trip point (at rx_rf) cw signal rf_gain = v il , rx_det = v oh to v ol -54 dbm rx detector hysteresis 5db rx detector rise time with 3db overdrive 1 s
max2820/max2820a/max2821/max2821a 2.4ghz 802.11b zero-if transceivers _______________________________________________________________________________________ 5 ac electrical characteristics ? transmit mode (max2820/ max2821 ev kit: v cc = +2.7v to +3.6v, f rf and f lo = 2400mhz to 2499mhz, f osc = 22mhz or 44mhz, transmit baseband inputs = 400mv p-p , shdnb = tx_on = v ih , rx_on = v il , csb = v ih , 0v v tx_gc +2.0v, rbias = 12k , i cp = +2ma, bw pll = 45khz, differential rf output matched to 50 through a balun, baseband input biased at +1.2v, registers set to default power-up set- tings, t a = +25 c, unless otherwise noted. typical values are at v cc = +2.7v, f lo = 2437mhz, f osc = 22mhz, unless otherwise noted.) parameter conditions min typ max units transmit signal path: baseband input to rf output rf output frequency range 2400 2499 mhz lo output frequency range 2400 2499 mhz t a = +25 c-1+3 tx rf output power v in = 400mv p - p at 5.5m h z, v tx _gc = 0v , i/q c w si g nal (n ote 7) t a = -40 ? c to +85 ? c -2 dbm -22mhz f offset -11mhz, 11mhz f offset 22mhz -37 tx rf acpr (note 8) -33mhz f offset < -22mhz, 22mhz < f offset 33mhz -59 dbc unwanted sideband -40 lo signal -30 in-band spurious signals relative to modulated carrier f rf = 2400mhz to 2483mhz spurs > 22mhz -80 dbc 2 f lo -40 tx rf harmonics 3 f lo -55 dbm f rf < 2400mhz -60 f rf = 2500mhz to 3350mhz -43 tx rf spurious signal emissions (outside 2400mhz to 2483.5mhz) nonharmonic signals f rf > 3350mhz -45 dbm tx rf output noise f offset 22mhz, 0v v tx_gc +2.0v -135 dbm/hz tx rf output return loss with external match 15 db tx baseband filter response -3db frequency 10 mhz at 22mhz 25 attenuation relative to passband at 44mhz 50 db tx gain-control characteristics gain-control range 0v v tx_gc +2.0v 30 db gain-control slope peak gain slope 40 db/v gain-control response time v tx_gc = +2.0v to 0v step 0.3 s
max2820/max2820a/max2821/max2821a 2.4ghz 802.11b zero-if transceivers 6 _______________________________________________________________________________________ ac electrical characteristics ? synthesizer (max2820/max2821 ev kit: v cc = +2.7v to +3.6v, f rf and f lo = 2400mhz to 2499mhz, f osc = 22mhz or 44mhz, shdnb = v ih , csb = v ih , rbias = 12k , i cp = +2ma, bw pll = 45khz, registers set to default power-up settings, t a = +25 c, unless otherwise noted. typical values are at v cc = +2.7v, f lo = 2437mhz, f osc = 22mhz, unless otherwise noted.) (note 11) parameter conditions min typ max units frequency synthesizer lo frequency range 2400 2499 mhz r(0) = 0 22 reference frequency r(0) = 1 44 mhz channel spacing 1 mhz icp = 0 1 max2820/max2821 icp = 1 2 charge-pump output current max2820a/max2821a 2 ma charge-pump compliance range 0.4 v cc - 0.4 v -11mhz f offset 11mhz -41 -22mhz f offset < -11mhz, 11mhz < f offset 22mhz -75 reference spur level (note 10) f offset < -22mhz, f offset > 22mhz -90 dbc f offset = 10khz -80 closed-loop phase noise f offset = 100khz -87 dbc/hz closed-loop integrated phase noise noise integrated from 100hz to 10mhz, measured at the tx_rf output 2.5 rms reference oscillator input level ac-coupled sine wave input 200 600 1000 mv p-p voltage-controlled oscillator vco tuning voltage range 0.4 2.3 v f lo = 2400mhz 170 vco tuning gain f lo = 2499mhz 130 mhz/v ac electrical characteristics ? pa bias (max2820/max2821 ev kit: v cc = +2.7v to +3.6v, shdnb = v ih , tx_on = v ih , csb = v ih , pa_bias enabled, rbias = 12k , regis- ters set to default power-up settings, t a = +25 c, unless otherwise noted. typical values are at v cc = +2.7v, unless otherwise noted.) parameter conditions min typ max units resolution 4 bits full-scale output current 300 a lsb size 20 a output voltage compliance range (note 11) 1.0 1.2 1.3 v settling time relative to rising edge of csb, zero to full- scale step 0000 1111, settle to 1/2 lsb, 2pf load 1s
max2820/max2820a/max2821/max2821a 2.4ghz 802.11b zero-if transceivers _______________________________________________________________________________________ 7 ac electrical characteristics ? system timing (max2820/max2821 ev kit: v cc = +2.7v to +3.6v, f rf and f lo = 2400mhz to 2499mhz, f osc = 22mhz or 44mhz, shdnb = v ih , csb = v ih , rbias = 12k , i cp = +2ma, bw loop = 45khz, registers set to default power-up settings, t a = +25 c, unless otherwise noted. typical values are at v cc = +2.7v, f lo = 2437mhz, f osc = 22mhz, unless otherwise noted.) (note 11) parameter conditions min typ max units channel-switching time f lo = 2400mhz 2499mhz, f lo settles to 10khz (note 9) 150 200 s rx to tx, output settles to within 2db of final value of output power, relative to rising edge of tx_on 3 rx/tx turnaround time (note 11) tx to rx, output settles to within 2db of final value of output power, relative to rising edge of rx_on 5 s standby-to-transmit mode standby to tx, output settles to within 2db of final value of output power, relative to rising edge of tx_on (note 11) 3s standby-to-receive mode standby to rx, output settles to within 2db of final value of output power, relative to rising edge of rx_on (note 11) 5s ac electrical characteristics ? serial interface timing (max2820/max2821 ev kit: v cc = +2.7v to +3.6v, registers set to default power-up settings, t a = +25 c, unless otherwise noted.) (note 11) parameter conditions min typ max units serial interface timing (see figure 1) t cso sclk rising edge to csb falling edge wait time 5 ns t css falling edge of csb to rising edge of first sclk time 5 ns t ds data-to-serial clock setup time 5 ns t dh data-to-clock hold time 10 ns t ch serial clock pulse-width high 10 ns t cl clock pulse-width low 10 ns t csh last sclk rising edge to rising edge of csb 5 ns t csw csb high pulse width 10 ns t cs1 time between the rising edge of csb and the next rising edge of sclk 5ns f clk clock frequency 50 mhz note 1: parameters are production tested at +25 c only. min/max limits over temperature are guaranteed by design and characterization. note 2: defined as the baseband differential rms output voltage divided by the rms input voltage (at the rf balun input). note 3: noise-figure specification excludes the loss of the external balun. the external balun loss is typically ~0.5db. note 4: cck interferer at 25mhz offset. desired signal equals -73dbm. interferer amplitude increases until baseband output from interferer is 10db below desired signal. adjacent channel rejection = p interferer - p desired . note 5: measured at balun input. two cw tones at -43dbm with 15mhz and 25mhz spacing from the max2820/max2821 channel frequency. ip3 is computed from 5mhz imd3 product measured at the rx i/q output. note 6: two cw interferers at -38dbm with 24.5mhz and 25.5mhz spacing from the max2820/max2821 channel frequency. ip2 is computed from the 1mhz imd2 product measured at the rx i/q output. note 7: output power measured after the matching and balun. tx gain is set to maximum. note 8: adjacent and alternate channel power relative to the desired signal. tx gain is adjusted until the output power is -1dbm. power measured with 100khz video bw and 100khz resolution bw. note 9: time required to reprogram the pll, change the operating channel, and wait for the operating channel center frequency to settle within 10khz of the nominal (final) channel frequency. note 10: relative amplitude of reference spurious products appearing in the tx rf output spectrum relative to a cw tone at 0.5mhz offset from the lo. note 11: min/max limits are guaranteed by design and characterization.
max2820/max2820a/max2821/max2821a 2.4ghz 802.11b zero-if transceivers 8 _______________________________________________________________________________________ typical operating characteristics (max2820/max2821 ev kit, v cc = +2.7v, f bb = 1mhz, f lo = 2450mhz, receive baseband outputs = 500mv p-p , transmit base- band inputs = 400mv p-p , i cp = +2ma, bw pll = 45khz, differential rf input/output matched to 50 through a balun, baseband input biased at +1.2v, registers set to default power-up settings, t a = +25 c, unless otherwise noted.) supply current vs. temperature max2820 toc01 temperature ( c) i cc (ma) 60 35 10 -15 10 20 30 40 50 60 70 80 90 100 0 -40 85 receive, v rf_gain = v ih receive, v rf_gain = v il transmit standby supply current vs. supply voltage max2820 toc02 v cc (v) i cc (ma) 3.3 3.0 10 20 30 40 50 60 70 80 90 100 0 2.7 3.6 receive, v rf_gain = v ih receive, v rf_gain = v il transmit standby max2820 toc03 v rx_agc (v) rx voltage gain (db) 1.5 1.0 0.5 20 40 60 80 100 120 0 02.0 receiver voltage gain vs. gain-control voltage v out = 500mv p-p f bb = 1mhz f lo = 2450mhz v rf_gain = v ih , ("a" version) v rf_gain = v il , ("a" version) v rf_gain = v ih v rf_gain = v il max2820 toc04 rf frequency (mhz) rx voltage gain (db) 2480 2460 2420 2440 5 10 15 20 25 30 35 40 0 2400 2500 receiver voltage gain vs. rf frequency f bb = 1mhz v rf_gain = v il , v rx_agc = 2.0v v rf_gain = v ih , v rx_agc = 2.0v max2820 toc05 rx gain (db) noise figure (db) 80 60 40 20 5 10 15 20 25 30 35 40 45 50 0 0100 receiver noise figure vs. gain v rf_gain = v il f bb = 1mhz f lo = 2450mhz v rf_gain = v ih max2820 toc06 p in (dbm) logic level -40 -45 -50 -55 -60 -65 -35 receiver detector hysteresis vs. input power high-gain mode max2820/max2821 only low-gain mode high low high low max2820 toc07 frequency (khz) normalized response (db) 100 10 -80 -70 -60 -50 -40 -30 -20 -10 0 10 -90 1 1000 receiver filter response (1khz to 1mhz) rx_1k = v ih rx_1k = v ih , ("a" version) rx_1k = v il , (both versions) max2820 toc08 frequency (mhz) normalized response (db) 10 -80 -70 -60 -50 -40 -30 -20 -10 0 10 -90 1 100 "a" version receiver filter response (1mhz to 100mhz) receiver leakage spectrum max2820 toc09 frequency (ghz) receiver leakage power (dbm) 7.2 6.4 4.8 5.6 1.6 2.4 3.2 4.0 0.8 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 -120 08.0 v rf_gain = v ih f lo = 2400mhz
max2820/max2820a/max2821/max2821a 2.4ghz 802.11b zero-if transceivers _______________________________________________________________________________________ 9 receiver baseband output spectrum max2820 toc10 frequency (mhz) baseband output power (dbm) 45 40 5 10 15 25 30 20 35 -70 -60 -50 -40 -30 -20 -10 0 -80 050 v rf_gain = v ih rx gain = 50db f bb = 5mhz f lo = 2450mhz max2820 toc11 frequency (mhz) tx output power (dbm) 2480 2460 2420 2440 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 2400 2500 transmitter output power vs. frequency +25 c ("a" version) +85 c ("a" version) -40 c ("a" version) +85 c +25 c -40 c v in = 400mv p-p v tx_gc = 0v 11mbps cck max2820 toc12 v cc (v) tx output power (dbm) 3.3 3.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 2.7 3.6 transmitter output power vs. supply voltage -40 c +25 c +85 c -40 c ("a" version) +25 c ("a" version) +85 c ("a" version) v in = 400mv p-p v tx_gc = 0v 11mbps cck -90 -80 -70 -60 -50 -40 -30 -20 -10 -33 -11 -22 0 112233 transmitter output spectrum max2820 toc13 frequency offset from carrier (mhz) tx output power (dbm) rbw = 100khz v in = 400mv p-p 11mbps cck p out = -1dbm -80 -60 -70 -40 -50 -30 -20 0 -10 10 0 0.8 1.6 2.4 3.2 4.0 4.8 5.6 6.4 7.2 8.0 transmitter output spectrum max2820toc14 frequency (ghz) tx output power (dbm) cw signal f bb = 3.3mhz f lo = 2450mhz max2820 toc15 v tx_gc (v) normalized gain (db) 1.5 1.0 0.5 -30 -25 -20 -15 -10 -5 0 5 -35 0 2.0 transmitter gain vs. gain-control voltage 0db = max p out at +25 c v in = 400mv p-p 11mbps cck +25 c -40 c +85 c -40 c ("a" version) +25 c ("a" version) +85 c ("a" version) typical operating characteristics (continued) (max2820/max2821 ev kit, v cc = +2.7v, f bb = 1mhz, f lo = 2450mhz, receive baseband outputs = 500mv p-p , transmit base- band inputs = 400mv p-p , i cp = +2ma, bw pll = 45khz, differential rf input/output matched to 50 through a balun, baseband input biased at +1.2v, registers set to default power-up settings, t a = +25 c, unless otherwise noted.)
max2820/max2820a/max2821/max2821a 2.4ghz 802.11b zero-if transceivers 10 ______________________________________________________________________________________ -50 -60 -70 -80 -90 -100 -110 -120 -130 100 10k 100k 1k 1m closed-loop phase noise vs. offset frequency max2820 toc19 offset frequency (hz) phase noise (dbc/hz) f lo = 2450mhz bw loop = 45khz i cp = 2ma int = 2.1 rms max2820/max2821 ("a" version) max2820/max2821 vco/pll setting time max2820 toc20 time ( s) frequency error (khz) -40 -30 -20 -10 0 10 20 30 40 50 -50 360 320 240 280 80 120 160 200 40 0400 bw loop = 45khz f lo = 2499mhz to 2400mhz typical operating characteristics (continued) (max2820/max2821 ev kit, v cc = +2.7v, f bb = 1mhz, f lo = 2450mhz, receive baseband outputs = 500mv p-p , transmit baseband inputs = 400mv p-p , i cp = +2ma, bw pll = 45khz, differential rf input/output matched to 50 through a balun, baseband input biased at +1.2v, registers set to default power-up settings, t a = +25 c, unless otherwise noted.) transmitter baseband filter response max2820 toc16 frequency (mhz) normalized response (db) 90 80 70 60 50 40 30 20 10 -50 -40 -30 -20 -10 0 10 -60 0100 f lo = 2450mhz lo frequency vs. tuning voltage max2820 toc17 v tune (v) lo frequency (ghz) 2.0 1.5 1.0 0.5 2.25 2.30 2.35 2.40 2.45 2.50 2.55 2.60 2.65 2.20 02.5 +25 c +85 c -40 c -50 -140 1 1000 100 10 open-loop phase noise vs. offset frequency -110 -130 -70 -90 -40 -100 -120 -60 -80 max2820 toc18 offset frequency (khz) phase noise (dbc/hz) f lo = 2450mhz measured at tx output
max2820/max2820a/max2821/max2821a 2.4ghz 802.11b zero-if transceivers ______________________________________________________________________________________ 11 pin configuration/functional diagram vcc_drvr 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 vcc_lna vref (max2821/max2821a) rf_gain rx_rfn rx_rfp vcc_ref rbias tx_rfp tx_rfn pa_bias tx_gc vcc_tmx tx_bbin tx_bbip tx_bbqp tx_bbqn vcc_txf gnd_dig vcc_dig n.c. roscp roscn din shdnb vcc_rxf vcc_lo vcc_vco byp tune gnd_vco gnd_cp cp_out vcc_cp csb sclk rx_agc tx_on vcc_rmx rx_on vcc_buf rx_bbip rx_bbin rx_bbqn rx_bbqp rx_1k dout rx_det (max2820/max2821) n.c. (max2820a/max2821a) max2820/ max2821 programming and mode control rx level detector 90 0 90 0
integer-n synthesizer serial interface vos comp
max2820/max2820a/max2821/max2821a 2.4ghz 802.11b zero-if transceivers 12 ______________________________________________________________________________________ pin description pin name description 1 vcc_lna supply voltage for lna. bypass with a capacitor as close to the pin as possible. do not share the bypass capacitor ground vias with other branches. n.c. no connection. not internally connected (max2820/max2820a only). 2 vref voltage reference output (max2821/max2821a only). 3 rf_gain lna gain select logic input. logic high for lna high-gain mode, logic low for lna low-gain mode. 4 rx_rfn receiver lna negative input. on-chip ac-coupling. requires off-chip impedance match and connection to 2:1 balun. 5 rx_rfp receiver lna positive input. on-chip ac-coupling. requires off-chip impedance match and connection to 2:1 balun. 6 vcc_ref supply voltage for bias circuitry and autotuner. bypass with a capacitor as close to the pin as possible. do not share the bypass capacitor ground vias with other branches. 7 rbias precision bias resistor pin. connect a 12k ? precision resistor ( 2%) to gnd. 8 tx_rfp transmit driver amplifier positive output. on-chip pullup choke to v cc . requires off-chip impedance match and connection to 4:1 balun. 9 tx_rfn transmit driver amplifier negative output. on-chip pullup choke to v cc . requires off-chip impedance match and connection to 4:1 balun. 10 pa_bias power-amplifier bias-current control signal. analog output. high-impedance, open-drain current source. connect directly to bias-current control input on external pa. 11 vcc_drvr supply voltage for transmit driver. bypass with a capacitor as close to the pin as possible. do not share the bypass capacitor ground vias with other branches. 12 tx_gc transmit gain-control input. analog high-impedance input. connect directly to baseband ic dac output. see the typical operating characteristics for transmitter gain vs. gain-control voltage. 13 vcc_tmx supply voltage for transmit mixer and vga. bypass with a capacitor as close to the pin as possible. do not share the bypass capacitor ground vias with other branches. 14 tx_bbin transmit negative in-phase baseband input. analog high-impedance differential input. connect directly to baseband ic dac voltage output. requires a 1.2v common-mode voltage. 15 tx_bbip transmit positive in-phase baseband input. analog high-impedance differential input. connect directly to baseband ic dac voltage output. requires a 1.2v common-mode voltage. 16 tx_bbqp transmit positive quadrature baseband input. analog high-impedance differential input. connect directly to baseband ic dac voltage output. requires a 1.2v common-mode voltage. 17 tx_bbqn transmit negative quadrature baseband input. analog high-impedance differential input. connect directly to baseband ic dac voltage output. requires a 1.2v common-mode voltage. 18 vcc_txf supply voltage for transmit baseband filter. bypass with a capacitor as close to the pin as possible. do not share the bypass capacitor ground vias with other branches. 19 gnd_dig digital ground
max2820/max2820a/max2821/max2821a 2.4ghz 802.11b zero-if transceivers ______________________________________________________________________________________ 13 pin description (continued) pin name description 20 vcc_dig supply voltage for digital circuitry. bypass with a capacitor as close to the pin as possible. do not share the bypass capacitor ground vias with other branches. 21 n.c. no connection. not internally connected. 22 roscp reference oscillator positive input. analog high-impedance differential input. dc-coupled. requires external ac-coupling. connect an external reference oscillator to this analog input. 23 roscn reference oscillator negative input. analog high-impedance differential input. dc-coupled. requires external ac-coupling. bypass this analog input to ground with a capacitor for single-ended operation. 24 din 3-wire serial-interface data input. digital high-impedance input. connect directly to baseband ic serial-interface cmos output (spi a /qspi a /microwire a compatible). 25 sclk 3-wire serial-interface clock input. digital high-impedance input. connect this digital input directly to baseband ic serial-interface cmos output (spi/qspi/microwire compatible). 26 csb 3-wire serial-interface enable input. digital high-impedance input. connect directly to baseband ic serial-interface cmos output (spi/qspi/microwire compatible). 27 vcc_cp supply voltage for pll charge pump. bypass with a capacitor as close to the pin as possible. do not share the bypass capacitor ground vias with other branches. 28 cp_out pll charge-pump output. analog high-impedance output. current source. connect directly to the pll loop filter input. 29 gnd_cp pll charge-pump ground. connect to pc board ground plane. 30 gnd_vco vco ground. connect to pc board ground plane. 31 tune vco frequency tuning input. analog high-impedance voltage input. connect directly to the pll loop filter output. 32 byp vco bias bypass. bypass with a 2000pf capacitor to ground. 33 vcc_vco supply voltage for vco. bypass with a capacitor as close to the pin as possible. do not share the bypass capacitor ground vias with other branches. important note: operate from separate regulated supply voltage. 34 vcc_lo supply voltage for vco, lo buffers, and lo quadrature circuitry. bypass with a capacitor as close to the pin as possible. do not share the bypass capacitor ground vias with other branches. 35 vcc_rxf supply voltage for receiver baseband filter. bypass with a capacitor as close to the pin as possible. do not share the bypass capacitor ground vias with other branches. 36 shdnb active-low shutdown input. digital high-impedance cmos input. connect directly to baseband ic mode control cmos output. logic low to disable all device functions. logic high to enable normal chip operation. 37 dout serial-interface data output . digital cmos output. optional connection. 38 rx_1k receiver 1khz highpass bandwidth control. digital cmos input. connect directly to baseband ic cmos output. controls receiver baseband highpass -3db corner frequency; logic low for 10khz, logic high for 1khz. see the applications information section for proper use of this function. spi and qspi are trademarks of motorola, inc. microwire is a trademark of national semiconductor corp.
max2820/max2820a/max2821/max2821a 2.4ghz 802.11b zero-if transceivers 14 ______________________________________________________________________________________ pin description (continued) pin name description 39 rx_bbqp receive positive quadrature baseband output. analog low-impedance differential buffer output. connect output directly to baseband adc input. internally biased to 1.2v common-mode voltage and can drive loads up to 5k ? || 5pf. 40 rx_bbqn receive negative quadrature baseband output. analog low-impedance differential buffer output. connect output directly to baseband adc input. internally biased to 1.2v common-mode voltage and can drive loads up to 5k ? || 5pf. 41 rx_bbin receive negative in-phase baseband output. analog low-impedance differential buffer output. connect output directly to baseband adc input. internally biased to 1.2v common-mode voltage and can drive loads up to 5k ? || 5pf. 42 rx_bbip receive positive in-phase baseband output. analog low-impedance differential buffer output. connect output directly to baseband adc input. internally biased to 1.2v and can drive loads up to 5k ? || 5pf. rx_det receive level detection output. digital cmos output. connect output directly to baseband ic input. used to indicate rf input level. logic high for input levels above -49dbm (typ). logic low for levels below -54dbm (typ). (max2820 and max2821) 43 n.c. no connection (max2820a/max2821a) 44 vcc_buf supply voltage for receiver baseband buffer. bypass with a capacitor as close to the pin as possible. do not share the bypass capacitor ground vias with other branches. 45 rx_on receiver-on control input. digital cmos input. connect to baseband ic mode control cmos output. 46 vcc_rmx supply voltage for receiver downconverter. bypass with a capacitor as close to the pin as possible. do not share the bypass capacitor ground vias with other branches. 47 tx_on transmitter-on control input. digital cmos input. connect directly to baseband ic mode control cmos output. 48 rx_agc receive agc control. analog high-impedance input. connect directly to baseband ic dac voltage output. see the typical operating characteristics for gain vs. v rx_agc . exposed paddle gnd dc and ac ground return for ic. connect to pc board ground plane using multiple vias. changes in a version the max2820a/max2821a are cost-reduced versions of the original max2820/max2821, intended as a drop- in replacement ? no changes to pc board layout, bom, or control software are required. functionally, the a version removes unused functions and programmability while maintaining virtually identical performance char- acteristics. the changes are detailed below. synthesizer the original device has the ability to program the charge-pump source/sink current (1ma or 2ma); the a version sets the charge-pump current at 2ma, and bit synth:d6 (icp) should now always be pro- grammed to be 1. receive filter the original device has the ability to control the base- band lpf corner; the a version sets the lpf corner at 8.0mhz. register bits receive:d2 e d0 are now don ? t cares. receive-level detector (rssi) the original device has a receive-level detect output (pin 43, rx_det ); the a version removes this functionality. pin 43 is a no-connect (n.c.) on the a version.
max2820/max2820a/max2821/max2821a 2.4ghz 802.11b zero-if transceivers ______________________________________________________________________________________ 15 operating modes the max2820/max2821 have four primary modes of operation: shutdown, standby, receive active, and transmit active. the modes are controlled by the digital inputs shdnb, tx_on, and rx_on. table 1 shows the operating mode vs. the digital mode control input. shutdown mode shutdown mode is achieved by driving shdnb low. in shutdown mode, all circuit blocks are powered down, except for the serial interface circuitry. while the device is in shutdown, the serial interface registers can still be loaded by applying v cc to the digital supply voltage (vcc_dig). all previously programmed register values are preserved during the shutdown mode, as long as vcc_dig is applied. standby mode standby mode is achieved by driving shdnb high and rx_on and tx_on low. in standby mode, the pll, vco, lo generator, lo buffer, lo quadrature, and fil- ter autotuner are powered on by default. the standby mode is intended to provide time for the slower- settling circuitry (pll and autotuner) to turn on and settle to the correct frequency before making rx or tx active. the 3-wire serial interface is active and can load register values at any time. refer to the serial-interface specifi- cation for details. receive mode receive mode is enabled by driving the digital inputs shdnb high, rx_on high, and tx_on low. in receive mode, all receive circuit blocks are powered on and all vco, pll, and autotuner circuits are powered on. none of the transmit path blocks are active in this mode. although the receiver blocks turn on quickly, the dc offset nulling requires ~10s to settle. the receiver signal path is ready ~10s after a low-to-high transition on rx_on. transmit mode transmit mode is achieved by driving the digital inputs shdnb high, rx_on low, and tx_on high. in transmit mode, all transmit circuit blocks are powered on and all vco, pll, and autotuner circuits are powered on. none of the receive path blocks is active in this mode. although the transmitter blocks turn on quickly, the baseband dc offset calibration requires ~2.2s to complete. in addition, the tx driver amplifier is ramped from the low-gain state (minimum rf output) to high- gain state (peak rf output) over the next 1s to 2s. the transmit signal path is ready ~4s after a low-to- high transition on tx_on. mode control inputs circuit block states operating mode shdnb tx_on rx_on rx_path tx_path pll/vco/lo gen. shutdown 0 x x off off off standby 1 0 0 off off on receive 1 0 1 on off on transmit 1 1 0 off on on table 1. operating-mode truth table csb sclk t css din dout t cso t csw t csh t cl t cs1 t tr bit 16 bit 15 bit 16 bit 15 bit 14 bit 8 bit 7 bit 6 bit 2 bit 1 bit 14 bit 8 bit 7 bit 6 bit 2 bit 1 t ch t dh t do t dv t ds figure 1. max2820/max2821 serial-interface timing diagram
max2820/max2820a/max2821/max2821a 2.4ghz 802.11b zero-if transceivers 16 ______________________________________________________________________________________ programmable registers the max2820/max2820a and max2821/max2821a (the max2820 family) contain programmable registers to control various modes of operation for the major cir- cuit blocks. the registers can be programmed through the 3-wire spi/qspi/microwire-compatible serial port. the max2820 family includes five programmable registers: 1) test register (always program as in table 2). 2) block-enable register 3) synthesizer register 4) channel frequency register 5) receiver settings register 6) transmitter settings register each register consists of 16 bits. the four most signifi- cant bits (msbs) are the register ? s address. the twelve least significant bits (lsbs) are used for register data. table 2 summarizes the register configu ration. a detailed description of each register is provided in tables 3 e 6. data is shifted in the msb first. the data sent to the transceiver, in 16-bit words, is framed by csb. when csb is low, the clock is active and data is shifted with the rising edge of the clock. when csb transitions to high, the shift register is latched into the register select- ed by the contents of the address bits. only the last 16 bits shifted into the device are retained in the shift reg- ister. no check is made on the number of clock pulses. figure 1 documents the serial interface timing for the max2820 family. power-up default states the devices provide power-up loading of default states for each of the registers. the states are loaded on a vcc_dig supply voltage transition from 0v to v cc . the default values are retained until reprogrammed through the serial interface or the power supply voltage is taken to 0v. the default state of each register is described in table 3. note: putting the ic in shutdown mode does not change the contents of the programming registers. block-enable register the block-enable register permits individual control of the enable state for each major circuit block in the transceiver. the actual enable condition of the circuit block is a logical function of the block-enable bit setting and other control input states. table 4 documents the logical definition of state for each major circuit block. synthesizer register the synthesizer register (synth) controls the reference frequency divider and charge-pump current of the pll. see table 5 for a description of the bit settings. channel frequency register the channel frequency register (channel) sets the rf carrier frequency for the radio. the channel is pro- grammed as a number from 0 to 99. the actual frequency is 2400 + channel in mhz. the default setting is 37 for 2437mhz. see table 6 for a description of the bit settings. receiver settings register (max2820/max2821 only) the receive settings register (receive) controls the receive filter -3db corner frequency, rx level detector midpoint, and vga dc offset nulling parameters. the defaults are intended to provide proper operation. 4 address bits 12 data bits a3 a2 a1 a0 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 register name msb151413 12 11 10 98765432 lsb test 0000 000000000111 enable 0001e11e10e9e8e7e6e5e4e3e2e1 e0 synth 0010 xxxxx icp r5 r4 r3 r2 r1 r0 synth ( a version) 0010 xxxxxx r5 r4 r3 r2 r1 r0 channel 0011 xxxxx cf6 cf5 cf4 cf3 cf2 cf1 cf0 receive 01002c22c12c01c21c11c0dl1dl0sfbw2bw1 bw0 receive ( a version) 01002c22c12c01c21c11c0 010xxx transmit 0101 xxxxxxxx pa3 pa2 pa1 pa0 table 2. programming register definition summary (address and data) x = don ? t care.
max2820/max2820a/max2821/max2821a 2.4ghz 802.11b zero-if transceivers ______________________________________________________________________________________ 17 register address default function enable 0001 000000011110 block-enable control settings (e) synth 0010 000001000000 synthesizer settings: ? reference frequency (r) ? lock-detect enable (ld) ? charge-pump current (icp) (max2820/max2821 only) channel 0011 000000100101 channel frequency settings (cf) receive 0100 111111010010 receiver settings: ? vga dc offset nulling parameter 1 (1c) ? vga dc offset nulling parameter 2 (2c) ? -3db lowpass filter bandwidth (bw) ? detector midpoint level (dl) ? special function bit (sf) transmit 0101 000000000000 transmit settings: ? pa bias (pa) address data bit content default description and logical definition d11 e(11) 0 reserved d10 e(10) 0 pa bias-control enable (pab_en) ? pab_en = shdnb (e(10) + tx_on) d9 e(9) 0 transmit baseband filters enable (txflt_en) ? txflt_en = shdnb (e(9) + tx_on) d8 e(8) 0 tx upconverter + vga + driver amp enable (txuvd_en) ? txuvd_en = shdnb (e(8) + tx_on) d7 e(7) 0 receive detector enable (det_en) ? det_en = shdnb (e(7) + rx_on) d6 e(6) 0 rx downconverter + filters + agc amps enable (rxdfa_en) ? rxdfa_en = shdnb (e(6) + rx_on) d5 e(5) 0 receive lna enable (rxlna_en) ? rxlna_en = shdnb (e(5) + rx_on ) d4 e(4) 1 autotuner enable (at_en) ? at_en = shdnb (e(4) + rx_on + tx_on) d3 e(3) 1 pll charge-pump enable (cp_en) ? cp_en = shdnb e(3) d2 e(2) 1 pll enable (pll_en) ? pll_en = shdnb e(2) d1 e(1) 1 vco enable (vco_en) ? vco_en = shdnb e(1) 0 0 0 1 d0 e(0) 0 reserved table 3. register power-up default states table 4. block-enable register (enable)
max2820/max2820a/max2821/max2821a 2.4ghz 802.11b zero-if transceivers 18 ______________________________________________________________________________________ address data bit content default description d11:d9 2c(2:0) 111 vga dc offset nulling parameter 2 d8:d6 1c(2:0) 111 vga dc offset nulling parameter 1 d5:d4 dl(1:0) 01 rx level detector midpoint select ? 11 = 01 = 50.2mv p ? 10 = 70.9mv p ? 00 = 35.5mv p d3 sf(0) 0 special function select (not presently used) ? 0 = off ? 1 = on 0 1 0 0 d2:d0 bw(2:0) 010 receive filter -3db frequency select (frequencies are approximate) ? 000 = 8.5mhz ? 001 = 8.0mhz ? 010 = 7.5mhz ? 011 = 7.0mhz ? 100 = 6.5mhz ? 101 = 6.0mhz table 7a. receive settings register (receive), (max2820/max2821 only) address data bit content default description d11:d7 x 00000 reserved icp (max2820/ max2821) 1 charge-pump current select ? 0 = 1ma charge-pump current ? 1 = 2ma charge-pump current d6 x (max2820a/ max2821a) 1 reserved 0 0 1 0 d5:d0 r(5:0) 000000 reference frequency divider ? 000000 = 22mhz ? 000001 = 44mhz table 5. synthesizer register (synth) address data bit content default description d11:d7 x 00000 reserved 0 0 1 1 d6:d0 cf(6:0) 0100101 channel frequency select: f lo = (2400 + cf(6:0))mhz ? 0000000 = 2400mhz ? 0000001 = 2401mhz ? ? 1100010 = 2498mhz ? 1100011 = 2499mhz table 6. channel frequency block register (channel)
max2820/max2820a/max2821/max2821a 2.4ghz 802.11b zero-if transceivers ______________________________________________________________________________________ 19 address data bit content default description d11:d9 2c (2:0) 111 vga dc offset nulling parameter 2 d8:d6 1c (2:0) 111 vga dc offset nulling parameter 1 d5:d3 x 010 reserved ? set to these values 0100 d2:d0 x 010 reserved ? x = don ? t care. rx filter is not programmable. table 7b. receive settings register (receive), (max2820a/max2821a only) however, the filter frequency and detector can be modi- fied if desired. do not reprogram vga dc offset nulling parameters. these settings were optimized during devel- opment. see table 7 for a description of the bit settings. transmitter settings register the transmitter settings register (transmit) controls the 4-bit pa bias dac. the 4 bits correspond to a pa bias current between 0 and full scale (~300a). see table 8 for the bit settings. applications information receive path lna the rx_rf inputs are high-impedance rf differential inputs ac-coupled on-chip to the lna. the lna inputs require external impedance matching and differential to single-ended conversion. the balanced to single- ended conversion and interface to 50 is achieved through the use of an off-chip 2:1 balun transformer, such as the small surface-mount baluns offered by murata and toko. in the case of the 2:1 balun, the rx rf input must be impedance-matched to a differen- tial/balanced impedance of 100 . a simple lc network is sufficient to impedance-match the lna to the balun. the typical application circuit shows the balun, induc- tors, and capacitors that constitute the matching net- work. refer to the max2820/max2821 ev kit schematic for component values of the matching network. the line lengths and parasitics have a noticeable impact on the matching element values in the board-level circuit. some empirical adjustment of lc component values is likely. balanced line layout on the differential input traces is essential to maintaining good ip2 performance and rf common-mode noise rejection. the receivers have two lna gain modes that are digitally controlled by the logic signal applied to rf_gain. rf_gain high enables the high-gain mode, and rf_gain low enables the low-gain mode. the lna gain step is nominally 30db. in most applications, rf_gain is connected directly to a cmos output of the baseband ic, and the baseband ic controls the state of the lna gain based on the detected signal amplitude. receiver baseband lowpass filtering the on-chip receive lowpass filters provide the steep filtering necessary to attenuate the out-of-band (>11mhz) interfering signals to sufficiently low levels to preserve receiver sensitivity. the filter frequency response is precisely controlled on-chip and does not require user adjustment. in the max2820/max2821, a provision is made to permit the -3db corner frequency and entire response to be slightly shifted up or down in frequency. this is intended to offer some flexibility in trading off adjacent channel rejection vs. passband distortion. the filter -3db frequency is programmed through the serial interface. the specific bit setting vs. -3db frequency is shown in table 7. the typical receive baseband filter gain vs. frequency profile is shown in the typical operating characteristics . receive gain control and dc offset nulling the receive path gain is varied through an external volt- age applied to the pin rx_agc. maximum gain is at v rx_agc = 0v and minimum gain is at v rx_agc = 2v. the rx_agc input is a high-impedance analog input designed for direct connection to the rx_agc dac output of the baseband ic. the gain-control range, which is continuously variable, is typically 70db. the gain-control characteristic is shown in the typical address data bit content default description d11:d4 x x reserved 0 1 0 1 d3:d0 pa(3:0) 0000 pa bias select: ? 1111 = highest pa bias ? ? 0000 = lowest pa bias table 8. transmit settings register (transmit)
max2820/max2820a/max2821/max2821a 2.4ghz 802.11b zero-if transceivers 20 ______________________________________________________________________________________ operating characteristics section graph receiver voltage gain vs. gain-control voltage. some local noise filtering through a simple rc network at the input is permissible. however, the time constant of this network should be kept sufficiently low in order not to limit the desired response time of the rx gain- control function. receiver baseband amplifier outputs the receiver baseband outputs (rx_bbip, rx_bbin, rx_bbqp, and rx_bbqn) are differential low-imped- ance buffer outputs. the outputs are designed to be directly connected (dc-coupled) to the in-phase (i) and quadrature-phase (q) adc inputs of the baseband ic. the rx i/q outputs are internally biased to +1.2v com- mon-mode voltage. the outputs are capable of driving loads up to 5k || 5pf with the full bandwidth baseband signals at a differential amplitude of 500mv p-p . proper board layout is essential to maintain good bal- ance between i/q traces. this provides good quadra- ture phase accuracy. receiver power detector (max2820/max2821 only) the receiver level detector is a digital output from an internal threshold detector that is used to determine when to change the lna gain state. in most applications, it is connected directly to a comparator input of the base- band ic. the threshold level can be programmed through the max2820/max2821 control software. transmit path transmitter baseband inputs the transmitter baseband inputs (tx_bbip, tx_bbin, tx_bbqp, and tx_bbqn) are high-impedance differ- ential analog inputs. the inputs are designed to be directly connected (dc-coupled) to the in-phase (i) and quadrature-phase (q) dac outputs of the baseband ic. the inputs must be externally biased to +1.2v common- mode voltage. typically, the dac outputs are current outputs with external resistor loads to ground. i and q are nominally driven by a 400mv p-p differential base- band signal. proper board layout is essential to maintain good bal- ance between i/q traces. this provides good quadra- ture phase accuracy by maintaining equal parasitic capacitance on the lines. in addition, it is important not to expose the tx i/q circuit board traces going from the digital baseband ic to the tx_bb inputs. the lines should be shielded on an inner layer to prevent cou- pling of rf to these tx i/q inputs and possible enve- lope demodulation of the rf signal. transmit path baseband lowpass filtering the on-chip transmit lowpass filters provide the filtering necessary to attenuate the unwanted higher-frequency spurious signal content that arises from the dac clock feedthrough and sampling images. in addition, the filter provides additional attenuation of the second sidelobe of signal spectrum. the filter frequency response is set on-chip. no user adjustment or programming is required. the typical gain vs. frequency profile is shown in the typical operating characteristics . transmitter dc offset calibration in a zero-if system, in order to achieve low lo leakage at the rf output, the dc offset of the tx baseband sig- nal path must be reduced to as near zero as possible. given that the amplifier stages, baseband filters, and tx dac possesses some finite dc offset that is too large for the required lo leakage specification, it is necessary to null the dc offset. the max2820 family accomplishes this through an on-chip calibration sequence. during this sequence, the net tx baseband signal path offsets are sampled and cancelled in the baseband amplifiers. this calibration occurs in the first ~2.2s after tx_on is taken high. during this time, it is essential that the tx dac output is in the 0v differential state. the calibration corrects for any dac offset. however, if the dac is set to a value other than the 0v state, then an offset is erroneously sampled by the tx offset calibration. the tx dac output must be put into the 0v differential state at or before the time tx_on is taken high. power-amplifier driver output the tx_rf outputs are high-impedance rf differential outputs directly connected to the driver amplifier. the outputs are essentially open-collector outputs with an on-chip inductor choke connected to vcc_drvr. the power-amplifier driver outputs require external imped- ance matching and differential to single-ended conver- sion. the balanced to single-ended conversion and interface to 50 is achieved through the use of an off- chip 4:1 balun transformer, such as one from murata or toko. in this case, the tx rf output must be imped- ance-matched to a differential/balanced impedance of 200 . the typical application circuit shows the balun, inductors, and capacitors that constitute the matching network of the power amplifier driver outputs. the out- put match should be adjusted until the return loss at the balun output is >10db.
max2820/max2820a/max2821/max2821a 2.4ghz 802.11b zero-if transceivers ______________________________________________________________________________________ 21 transmit gain control the transmit gain-control input provides a direct analog control over the transmit path gain. the transmit gain is controlled by an external voltage at pin tx_gc. the typ- ical gain-control characteristic is provided in the typical operating characteristics graph transmitter gain control vs. gain-control voltage. the input is a high- impedance analog input designed to directly connect to the dac output of the baseband ic. some local noise filtering through a simple rc network at the input is per- missible. however, the time constant of this network should be kept sufficiently low so the desired response time of the tx gain-control function is not limited. during the tx turn-on sequence, the gain is internally set at the minimum while the tx baseband offset cali- bration is taking place. the rf output is effectively blanked for the first 2.2s after tx_on is taken high. after 2.2s, the blanking is released, and the gain- control amplifier ramps to the gain set by the external voltage applied to the tx_gc input. pa bias dac output the max2820 family provides a programmable analog current source output for use in biasing the rf power amplifier, such as the max2242. the output is essentially an open-drain output of a current source dac. the output is designed to directly connect to the bias-current pin on the power amplifier. the value of the current is deter- mined by the 4 bits programmed into transmit (d3:d0). this programmability permits optimizing of the power- amplifier idle current based on the output power level of the pa. care must be taken in the layout of this line. avoid running the line in parallel with the rf line. rf might cou- ple onto the line, given the high impedance of the output. this might result in rectified rf, altering the value of the bias current and causing erratic pa operation. synthesizer channel frequency and reference frequency the synthesizer/pll channel frequency and reference settings establish the divider/counter settings in the inte- ger-n synthesizer. both the channel frequency and ref- erence oscillator frequency are programmable through the serial interface. the channel frequency is pro- grammed as a channel number 0 to 99 to set the carri- er frequency to 2400mhz to 2499mhz (lo frequency = channel + 2400). the reference frequency is program- mable to 22mhz or 44mhz. these settings are intend- ed to cover only the required 802.11b channel spacing and the two possible crystal oscillator options used in the radios. reference oscillator input the reference oscillator inputs roscp and roscn are high-impedance analog inputs. they are designed to be connected to the reference oscillator output through a coupling capacitor. the input amplitude can range from 200mv p-p to 1000mv p-p ; therefore, in the case of a reference oscillator with a cmos output, the signal must be attenuated before being applied to the rosc inputs. the signal can be attenuated with a resistor- or capacitor-divider network. reference voltage output a voltage reference output is provided on the max2821/ max2821a from pin 2, vref, for use with certain base- band ics. the nominal output voltage is 1.2v. the ref- erence voltage is first- order compensated over temperature to provide a reasonably low drift output, 1.1v to 1.3v over temperature, under load conditions. the output stage is designed to drive 2ma loads with up to 20pf of load capacitance. the vref output is designed to directly connect to the baseband refer- ence input. loop filter the pll uses a classical charge pump into an external loop filter (c-rc) in which the filter output connects to the voltage tuning input of the vco. this simple third- order lowpass loop filter closes the loop around the synthesizer. the typical application circuit shows the loop filter elements around the transceiver. the capaci- tor and resistor values are set to provide the loop band- width required to achieve the desired lock time while also maintaining loop stability. refer to the max2820/ max2821 ev kit schematic for component values. a 45khz loop bandwidth is recommended to ensure that the loop settles quickly enough to achieve 5s tx turn- around time and 10s rx turnaround time. this is the loop filter on the ev kit. narrowing the loop bandwidth increases the settling time and results in unacceptable tx-rx turnaround time performance. chip information transistor count: 13,607
max2820/max2820a/max2821/max2821a 2.4ghz 802.11b zero-if transceivers 22 ______________________________________________________________________________________ typical application circuit vcc_drvr 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 vcc_lna vref (max2821/max2821a) rf_gain rx_rfn rx_rfp vcc_ref rbias tx_rfp tx_rfn pa_bias tx_gc vcc_tmx tx_bbin tx_bbip tx_bbqp tx_bbqn vcc_txf gnd_dig vcc_dig n.c. roscp roscn din shdnb vcc_rxf vcc_lo vcc_vco byp tune gnd_vco gnd_cp cp_out vcc_cp csb sclk loop filter rx_agc tx_on vcc_rmx rx_on vcc_buf rx_bbip rx_bbin rx_bbqn rx_bbqp rx_1k dout rx_det (max2820/max2821) n.c. (max2820a/max2821a) max2820/max2820a/ max2821/max2821a programming and mode control rx level detector 90 0 90 0
integer-n synthesizer serial interface vos comp digital mode control signals from/to baseband ic tx analog input signal from baseband ic reference oscillator input rx analog output signal to baseband ic digital mode control signals to/from baseband ic rx gain-control signals to/from baseband ic rx rf input from switch and bpf tx rf output to switch and bpf serial interface to baseband ic dac output from baseband ic to pa bias input dac output from baseband ic optional connection to baseband
max2820/max2820a/max2821/max2821a 2.4ghz 802.11b zero-if transceivers ______________________________________________________________________________________ 23 package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) 32, 44, 48l qfn.eps h 1 2 21-0092 package outline 32,44,48l qfn, 7x7x0.90 mm
max2820/max2820a/max2821/max2821a 2.4ghz 802.11b zero-if transceivers 24 ______________________________________________________________________________________ u h 2 2 21-0092 package outline, 32,44,48l qfn, 7x7x0.90 mm package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .)
max2820/max2820a/max2821/max2821a 2.4ghz 802.11b zero-if transceivers ______________________________________________________________________________________ 25 package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) 32, 44, 48l qfn .eps e l e l a1 a a2 e/2 e d/2 d detail a d2/2 d2 b l k e2/2 e2 (ne-1) x e (nd-1) x e e c l c l c l c l k detail b e l l1 proprietary information document control no. approval title: rev. 2 1 21-0144 dallas semiconductor package outline 32, 44, 48, 56l thin qfn, 7x7x0.8mm d
max2820/max2820a/max2821/max2821a 2.4ghz 802.11b zero-if transceivers maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 26 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ? 2005 maxim integrated products printed usa is a registered trademark of maxim integrated products, inc. package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) proprietary information document control no. approval title: rev. 2 2 21-0144 dallas semiconductor package outline 32, 44, 48, 56l thin qfn, 7x7x0.8mm d

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